ASIC DIGITAL DESIGN

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ASIC DIGITAL DESIGN

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We provide comprehensive digital design services tailored to the most demanding applications in the semiconductor industry. Our team has deep expertise in building high-performance, low-power digital IPs and SoC subsystems from RTL to GDSII.

  • RTL Design & Microarchitecture Development
    ◦ High-performance logic design for CPU, GPU, and DSP blocks
    ◦ Custom IPs and SoC subsystems for RISC-V, ARM, and proprietary cores

  • Design for High-Speed Interfaces
    ◦ Protocol-specific design support for:

    ▪ USB 2.0/3.0/3.1/4.0
    ▪ PCIe Gen3/4/5/6
    ▪ Ethernet (10G/25G/100G/400G)
    ▪ HDMI 2.1
    ▪ UCie, UALink, and other Die-to-Die interfaces
    ▪ HBM, LPDDR3/4/5/5X

  • Memory Subsystem Design
    ◦ Custom memory compilers and memory controllers
    ◦ Integration with SoC-level memory architectures

  • Foundation IP & Cell Library Development
    ◦ Design of standard cells, IOs, and specialized logic functions
    ◦ Timing, power, and area-optimized cell libraries

  • FT, STA & ATPG, LIB
    ◦ Scan insertion, test point insertion, and ATPG vector generation
    ◦ Static Timing Analysis (STA) at block and top levels
    ◦ Liberty generation for IP block level and Top level

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